Challenging Engineering Problems with Detailed Answers

Question 15 In the figure below, if the baud rate is 2400 symbols per second, what is the bit rate (bits per second)? Voltage 000 001 000 011 110 111 Data Transmissions 101 100 000 5 pts
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: vs (t) x(t) + 2ax(t) +wx(t) = f(t). Let x(t) be ve(t). vs(t) = u(t). I in m ic(t) vc(t) (a) Determine a and w, by first determining a second order differential equation in where x(t) vc(t). = (b) Let R = 100N, L = 3.3 mH, and C = 0.01F. Is there ringing (i.e. ripples) in the step response of ve(t). (c) Let R = 20kn, L = 3.3 mH, and C = 0.01F. Is there ringing (i.e. ripples) in the step response of ve(t).
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If the highest frequency of a baseband signal is fi, write down the corresponding bandwidth of the modulated signal in AM, DSB, SSB, VSB system respectively. 6. Draw the principle models of DSB signal generation and demodulation.
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Draw a 3-phase Star-Delta motor starter circuit. Label all components used and provide a brief explanation for the operation of the circuit. [5]
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Three set of single-phase transformers, 20 kVA, 2300/230 V, 50 Hz are connected to form a threephase, 3984/230 V, transformer bank. The equivalent impedance of each transformer referred to its low voltage side is (0.0012 + j0.024) . The three- phase transformer bank supplies a load of 54 KVA at a power factor of 0.85 lagging at rated voltage by means of a common three-phase load impedance with (0.09 + j0.01) per phase. Compute the following: i) A schematic diagram showing the transformer connection. ii) The sending end voltage of the three-phase transformer. iii) The voltage regulation.
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What kind of encoding is shown in this figure? amplitude in volts---> 2 ~ 1.5 50 100 O Amplitud Shift Keying (ASK) O Phase modulation (PM) O Phase Shift Keying (PSK) O Frequency Shift Keying (FSK) 2 150 2.5 200 Data 3 time in secs---> 250 time in secs---> 3.5 300 350 4 400 4.5 450 5 500
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Given: 3-STOREY FLOOR SYSTEM DL + LL = 2KPa Beams = 7.50 E = 10,300 MPa & = 300 F-16.30 MPa, Fr 1.10 MPa, Fp = 10.34 Mia Unsupported Length of Column (L) = 2.80 m KN Required: W=? B-1 WE B-2 W=? 8-2 W=? B-1 -X a) Design B-1 and B-2 b) Design the timber column. int: Column Load (P) = Total Reactions x No. of Storey
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: Discrete Op-Amp/Multi-Stage Amplifier Design [Max. 60 Marks] In this task you are going to design a multi-stage Amplifier using 2N3904 (NPN) and 2N3906 (PNP) transistors. The basic architecture for an Op-Amp will contain a differential input stage, followed by a CE Amplifier and an output stage as shown in Figure 2. Vin+ Vin- Differential Pair CE Amplifier The basic specifications for the multistage are outlined below: Figure 2: Multi-Stage Amplifier Block Diagram Open loop-gain (A): > 80 dB (10000 V/V) input impedance (Rin) > 100 ks output impedance (R) < 75 CMRR > 100dB. Vcc= -VEE = 15V Phase Margin > 70 Slew Rate Offset Voltage Output Stage 41. # 59 V2 U= VCC| Vin +1. Pr5 V3 U= R16 R= T1 Vaf=1 Bf=; HE Pr1 Pre T3 Vaf= Bf= R12 R= R10 R= Vo1 2 Pr8 Prg Pr T4 Vaf= Bf=' R18 R= Vo2 + 1 Pr3 MO T5 Vaf= Bf= R14 R= Vout
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A 3-phase, 4 wire system has the following unbalanced loads. ZAN= 535, ZBN= 8-70 and ZCN= 15.32-63.5 and having a 254V line to neutral. Assuming negative phase sequence, find the following.a.) Find the three line currentsb.) Find the current in the neutral wire.c.) Find the total power of the system.
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Provide a sketch of a double acting cylinder adjustable cushion advance only. (2 marks) b) Provide a sketch of a double acting cylinder fixed cushion advance and retract.
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For the Electrical circuit shown in Fig. Q 5.1, the voltages V, (t) and Vo (t) denote the circuit input and output voltage respectively, with the circuit parameters given by: R=42, R=2 /y= L-50 mH and C= 0.5 F. 4 + ww R mmm L R + #1 I U = = = 2 fill C= we IL Y Fig. Q 5.1 Sv 5.1.1 Identify the dynamic order and appropriate system states for this circuit. [4] 5.1.2 Write down the differential equations for the inductor current and capacitor voltages respectively [4] 5.1.3 Derive the state space equation for this circuit [7] 5.1.4 Derive the equivalent transfer function for the circuit relating the output voltage to the input voltage [5] "I-I (d)
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A 10-inch pipe has a head loss of 5 ft per 1000-ft length. Determine how many 10-in. pipes that would be equivalent (a) to a 20-in. pipes and (b) to a 24-in pipes with the same head loss. Use C = 100 for all pipes.
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Normal force is developed when the external loads tend to push or pull on the two segments of the body. If the thickness ts10/D,it is called thin walled vessels. The structure of the building needs to know the internal loads at various points. A balance of forces prevent the body from translating or having a accelerated motion along straight or curved path. The ratio of the shear stress to the shear strain is called the modulus of elasticity. True or false
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A 60 Hz synchronous generator rated 30 MVA at 0.90 power factor has the no-load frequency of 61 Hz. Determine: a. generator frequency regulation in percentage and in per unit, and b. generator frequency droop rate.
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10. Water flows through 61 m of 150-mm pipe, and the shear stress at the walls is 44 Pa. Determine the lost head. 11 1000 ft long
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Why limiter circuit is needed in FM ?system For system stability O For synchronizing O For Bandwidth limiting O For frequency stability O For signal removing O For noise removing O For power improving O
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FDM system user to combine 9 tones on a single carrier four of these tones are each 2.5 kHz and modulated SSB on sub-carrier with guard band of 200 Hz. The other is each at 4.2 kHz and are modulated FM on sub-carrier with modulation index of 5 with guard band of 300 Hz. The base band signal is frequency modulated on main carrier with modulation index of 10. calculate the transmission bandwidth of the FDM signal. Assuming 400 Hz as a guard band .between SSB and FM sub-carrier BW=4.812 MHz BW=3.812 MHz BW=7.812 MHz BW=8.812 MHz O BW=6.812 MHz BW-5.812 MHz BW=9.812 MHz
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A system is used to transmit base3 PCM signal of 256 level steps, the input signal works in the range between (50 to 90) kHz. Find the bit rate and signal to noise ratio in dB? Note that: the step size is considered ?to be triple times system levels 520 Mbps, 64.5 dB 530 Mbps, 65.5 dB O 560 Mbps, 68.5dB O 570 Mbps, 69.5 dB O 530 Mbps, 53.5 dB 550 Mbps, 67.5 dB 540 Mbps, 66.5 dB
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A signal is limited to the range peak to peak 10 V and frequency in the range (800 to 3300 Hz). The communication system is updated to allow increasing of about 50% above the old 64 quantization levels. Find the bandwidth if the quantized samples are transmitted either as binary ASK pules or as 16-level .pulsed BW1=71 kHz, BW2=18.5kHz O BW1=75 kHz, BW2=22.5kHz O BW1=72 kHz, BW2=19.5kHz O BW1=70 kHz, BW2=17.5kHz O BW1=74 kHz, BW2=21.5kHz O BW1=69 kHz, BW2=16.5kHz O BW1=73 kHz, BW2=20.5kHz
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Choose the correct answer: 1. x(t) or x[n] is said to be an energy signal (or sequence) if and only its power is..... a. Infinity. b. Less than infinity. c. More than zero. d. Zero. e. Less than zero. 2. Odd signals are symmetrical on..... a. x-axis. b. y-axis. c. z-axis. d. Original point. e. All of them. 3. A is a function representing a physical quantity or variable, and typically it contains information about the behavior or nature of the phenomenon. b. System. c. Continuous system. d. Signal. e. None of them. a. Discrete system. 4. In Fourier series, Fourier coefficient(s) is (are)..... b. bn. d. Cn. C. Xn. a. an. e. All of them. 5. The discrete time system is said to be stable if poles lying.........circle. a. Outside unit. b. At unit. c. Inside unit. d. At 2r. e. All of them.
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MSI Circuit Design Design and implement the following function using combinational digital circuits. You may use any Logic Gates, Multiplexers and Decoders F (A, B, C, D) = BD + B'D' + A'C + AB'C' 1 5 points Design the output K-Map 2 5 points Design the output truth table 3 10 points Sketch the final design implementation circuit
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Explain how a photodiode and a laser diode are biased and canproduce photocurrent and stimulated light emissionrespectively.
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.Which of the following statement is correct for the root-locus and pole placement technique?a. the pole-placement technique deals with placing all open-loop poles to achieve overall design goals.b. the Root-locus technique deals with placing dominant poles and all closed-loop poles to achieve design goals.c. the pole-placement technique deals with placing all closed-loop poles to achieve overall design goals.2. A dynamic compensator with passive elements which reduces the steady-state error of a closed-loop system isa pure integral controllerb.a lag compensator.c. a lead compensator.3. Select the right statement from the following?a. Settling time is inversely proportional to the imaginary part of the complex pole.c. Settling time is inversely proportional to the real part of the complex pole.c.Settling time is directly proportional to the imaginary part of the complex pole.
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Consider a MFSK transmission that requires a bandwidth of 640 kHz. If the chosendifference frequency is 10 kHz,a. Calculate the value of Mb. Calculate the achievable data rate for this transmission.
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